Floating point numbers are one possible way of representing real numbers in binary format; the IEEE 754 ?standard presents two different floating point formats, Binary interchange format and Decimal interchange format. Multiplying floating point numbers is a critical requirement for DSP applications involving large dynamic range. This paper focuses only on single precision normalized binary interchange format. Fig. 1 shows the IEEE 754 single precision binary format representation; it consists of a one bit sign (S), an eight bit exponent (E), and a twenty three bit fraction (M or Mantissa). An extra bit is added to the fraction to form what is called the significand1. If the exponent is greater than 0 and smaller than 255, and there is 1 in the MSB of the significand then the number is said to be a normalized number; in this case the real number is represented by .
Multiplying two numbers in floating point format is done by 1- adding the exponent of the two numbers then subtracting the bias from their result, 2- multiplying the significand of the two numbers, and 3- calculating the sign by XORing the sign of the two numbers. In order to represent the multiplication result as a normalized number there should be 1 in the MSB of the result (leading one).Floating-point implementation on FPGAs has been the interest of many researchers. In [2], an IEEE 754 single precision pipelined floating point multiplier was implemented on multiple FPGAs (4 Actel A1280). In [3], a custom 16/18 bit three stage pipelined floating point multiplier that doesn?t support rounding modes was implemented. In [4], a single precision floating point multiplier that doesn?t support rounding modes was implemented using a digit-serial multiplier: using the Altera FLEX 8000 it achieved 2.3 MFlops. In [5], a parameterizable floating point multiplier was implemented using the software-like language Handel-C, using the Xilinx XCV1000 FPGA; a five stages pipelined multiplier achieved 28MFlops. In [6], a latency optimized floating point unit using the primitives of Xilinx Virtex II FPGA was implemented with a latency of 4 clock cycles. The multiplier reached a maximum clock frequency of 100 MHz.
The FLOATING POINT UNIT is a dedicated execution unit designed for performing math functions on floating point numbers. A floating point number is any number other than an integer; any number with a decimal point required to represent it is a floating point number. Integers (and data stored as integers) are processed using the processor's integer execution unit(s).
In computing, floating point describes a method of representing real numbers in a way that can support a wide range of values. Numbers are, in general, represented approximately to a fixed number of significant digits and scaled using an exponent. The base for the scaling is normally 2, 10 or 16. The typical number that can be represented exactly is of the form:
Significant digits ? baseexponent
A method for storing and calculating numbers in which the decimal points do not line up as in fixed point numbers. The significant digits are stored as a unit called the "mantissa," and the location of the radix point (decimal point in base 10) is stored in a separate unit called the "exponent." Floating point methods are used for calculating a large range of numbers quickly.
FPU Stands for "Floating Point Unit." The first computer processors were far better at dealing with integers than with real numbers (a.k.a. floating point numbers). So a separate FPU processor was developed to handle the floating point calculations. That way, when the CPU encountered a floating-point expresion (ie. 1.62 * 0.87359), it would send the calculation to the FPU. Since the FPU is specifically designed to handle floating-point math, it computes expressions involving real numbers more efficiently. While the first floating point units used to be manufactured as individual chips, they are now typically integrated into the CPU.
The FPU, also known as a co-processor, used to be an option when the first PCs came on the market. Modern PCs are now all provided with a co-processor. Although the original PC-XT has evolved considerably over the years, the FPU itself has not changed appreciably during that same period. Apart from a few minor instructions having been added, the main improvement has been the extended range of some of the existing instructions.
The entire set of assembler instructions for the FPU is relatively small and could be memorized rapidly. Learning which parameter(s) can be used with each instruction should take only slightly longer. The main difficulty is in developing sound programming techniques to avoid some of the pitfalls peculiar to the FPU.
The main purpose of this document is to show that using the FPU can be relatively easy with minimal effort. Once the basics have been mastered, any computation however complex can be performed.
A floating point number is a binary number carried out to a specific number of digits, and containing a radix (or decimal) point somewhere in the digit sequence. Such numbers are stored in three parts: the sign (either plus or minus), the mantissa (sequence of meaningful digits), and the exponent (power or order of magnititude), which determines the position in the mantissa where the radix point is placed. The main operations of the FPU consist of conventional arithmetic such as addition and multiplication. Some FPUs can also perform more sophisticated.
Download your Full Reports for Floating point Multiplier
Advertisement